AMD Webinar

Today there was an AMD webinar and “Meet the Experts“ event for partners about their new upcoming Polaris architecture that was hosted by their Community Manager Carolina Castano and Senior Technology Manager David Nalasco for their partners. AMD was kind enough to open this particular webinar to public. Unfortunately the AMD webinar didn’t bring with it any surprises that some had been hoping for. As the AMD community manager said in the beginning, this was NOT a launch effort. It was a summary of Polaris architecture for partners before launch which should happening in the coming months.

However, despite that, we were able to get some new bits of information from their Q&A section at the end of the webinar.

AMD Webinar

AMD Webinar Polaris Sneak Peak; “Meet the Experts”

First bit is the actual number GPUs AMD is preparing. There will be 2 GPUs. One smaller called Polaris 11 and a second bigger one which is called Polaris 10, as we mentioned before. Those two GPUs will have surely have their cut down versions and will have a wide range of different board designs as well as separate mobile versions, which AMD pointed out in the webinar. From reference designs to various AIB designs. AMD noted that we will see these reference and AIB designs in coming weeks and months.

AMD also pointed out one of their key features in their Polaris architecture which is Asynchronous Compute. This feature, also found in previous GCN based AMD GPUs, will help to improve performance in future DX12/Vulkan titles and AMD is very keen on pushing this feature into upcoming titles and they stated they will drive it even more aggressively than before. Interesting stuff.

Another bit AMD mentioned in Q&A section is that all Polaris based GPUs will share the same multimedia capabilities. Features specifically mentioned were 10-bit decode and hardware accelerated H.265.

AMD Webinar

AMD didn’t say much about performance but they specified that they were able do get to get more performance out of each transistor not only thanks to 14nm FinFET process but also by virtue of the various optimizations within the Polaris architecture itself.

Now probably the most interesting part of the whole QA session. We asked them if the efficiency improvements that AMD specified in their previous presentations are uniform for all GPUs AMD will offer or if it’s just for the most efficient GPU of the whole family. We were lucky enough to get my question answered with a little tiny bit of extra unexpected spice. AMD answered that there will be wide range of different board designs which means some will have different clocks than others. This means that some will be more efficient than others but generally the capability and improvements will be there.

Another interesting part about this answer was when AMD mentioned AIB partners and that some of them will most likely try to drive the clocks as high as possible with their own designs, which would mean lower efficiency. Which is quite interesting indeed. It means that AMD is not limiting AIB partners with clockspeeds for the sake of better efficiency and this should be great news for those who want the best possible performance.